Compiler driven hardware generation for dataflow heavy applications
Bachelor’s Thesis / Master’s Thesis / Student Research Project
Abstract
Modern custom hardware compute platforms are often derived from dataflow descriptions of computational tasks. Traditionally, such platforms are implemented by teams of engineers using hardware description languages (HDLs) or automated translation tools like high-level synthesis (HLS).
To accelerate development and enable rapid design-space exploration, we have developed GOURD — a framework for dataflow-driven hardware design. GOURD introduces:
- A concise and expressive domain-specific language (DSL) for describing dataflow movement and processing at an abstract level.
- A compiler-based hardware generator capable of producing scalable, multi-instance compute platforms.
- An automated exploration and verification framework to evaluate different memory architectures and their impact on overall system performance.
GOURD is implemented in C++ and SystemVerilog and can be deployed on both FPGA and ASIC platforms.
Possible Thesis Topics
- Development of new modeling-based or formal verification techniques
- Extending the hardware generator with advanced features
- Reworking and optimizing backend compiler passes
If you are interested in contributing to GOURD or pursuing a related thesis project, please contact us directly for more information.
References
- Paper: “GOURD: Tensorizing Streaming Applications to Generate Multi-Instance Compute Platforms”
- MLIR
- SystemVerilog
Requirements
- C++/Python
- Linux and Git
- SystemVerilog (recommended)
- Understanding of computer architectures
- Successfully atteded the lecture “Grundlagen der Rechnerarchitektur” (recommended)
- Successfully atteded the lecture “Advanced Computer Architecture” (recommended)
- Successfully atteded the lecture “Modellierung und Analyse von Eingebetteten Systemen” (recommended)
- Successfully atteded the lecture “Digital Design and Synthesis of Embedded Systems” (recommended)