Implementation of a software controlled power management controller
Master’s thesis/ Student Research Project
Software controlled power management is a standard technique to lower the energy consumption of computers of all sizes. Due to the huge range of different applications executed on end-user systems, the power management is often governed by the operating system. For embedded systems however, the application code is often known and well-defined at the system design stage. As a result, the potential for more precise and specific power-saving optimizations arises. Positions in the software code for power mode transitions can be identified using static analysis or simulation results of the software.
Within this project an extension of a Power Management Controller (PMC) will be implemented in Verilog. This PMC will be software-configurable and triggers power mode changes in accordance with a pre-configured schedule.