Extension of an on-chip Instruction Tracer for the RI5CY Processor
For the performance analysis of programs, the reconstruction of the control flow is of great importance. Usually these control flow analyses are performed in simulators, which have the disadvantage that an analysis takes a long time. An on-chip instruction tracer opens the possibility to perform such a control flow analysis in real time. The goal of this thesis is to extend the existing instruction tracer and to increase its performance.
- Sucessfully passed ESES lecture or knowledge of hardware design using Verilog or VHDL