Embedded Systems

Design and Implementation of a PULPissomo Dual-Core Architecture

Master’s Thesis

Abstract

The PULPissimo SoC currently has only one processor core. However, modern high-performance applications benefit greatly from the use of multiple processor cores. The aim of this work is to integrate a second processor core into the PULPissimo SoC and implement a communication protocol.

Requirements

  • Sucessfully passed ESES lecture or knowledge of hardware design using Verilog or VHDL

Contact

Bringmann, Oliver

Frischknecht, Adrian

Lübeck, Konstantin